Large processing systems that contain one or more microprocessors or micro-controllers use a read-only memory (ROM) to store programs and tables and a read-write memory, such as random access memory (RAM), Flash memory, or the like. Frequently, the program in the ROM must be updated with patched code to fix bugs or to enhance functionality. This is problematic because the code in the ROM cannot be modified.
A number of solutions have been proposed to address this problem. Conventional ROM code patching apparatuses have been based on the principle of storing the patched code in the read-write memory and implementing a technique to deliver the patched code from the read-write memory whenever the patched code address is referenced. U.S. Pat. No. 6,260,157 to Schurecht et al. and U.S. Pat. No. 5,757,690 to McMahon discuss techniques for accomplishing this.
One technique is based on the use of a content addressable memory (CAM). A CAM has several entries and each entry holds the following information:
a) The ROM address that is to be patched; and
b) The corresponding RAM address that holds the patched code.
This approach is hardware intensive and is not power efficient. Also, the size of the CAM limits the number of ROM addresses that can be patched.
In another technique, the program executes a function by using a table to discover the entry-point of the function. The tables are initially stored in ROM and are subsequently copied to the read-write memory before the functions are invoked. With this technique, it is possible to patch the read-write and use the patched code in the read-write memory. However, this method is not generic enough, requires duplication, and makes it difficult to write the functions. It is, therefore, quite impractical.
Additionally, software breakpoints are special instructions that are inserted by a debugger program to enable debugging of an application. When the user deletes the breakpoint, the debugger replaces the software breakpoint instruction with the original instruction.
In the case of a data processor with a program cache, the sequence for inserting a data breakpoint is as follows:
1) Perform a PINV<breakpoint-address>. This instruction invalidates the breakpoint line from the cache.
2) Save the original instruction at the breakpoint-address in the local heap of the debugger.
3) Replace the original instruction with the software breakpoint instruction.
The sequence for removing a data breakpoint is as follows:
1) Perform a PINV<breakpoint-address>. This instruction invalidates the breakpoint line from the cache.
2) Restore the instruction at the breakpoint-address with the original instruction from the local heap of the debugger.
The above sequence does not work in the case of the breakpoint-address belonging to the ROM address space. This is because one cannot store into the ROM space. An additional challenge arises when the breakpoint-address is a part of the ROM patch address list. In this case the patched instruction has to be restored instead of the original instruction that was part of the ROM.
Therefore, there is a need in the art for improved apparatuses and methods for efficiently performing ROM patching in a data processing system. In particular, there is a need for apparatuses and methods for efficiently performing ROM patching that do not adversely affect the operation of software breakpoints used by debugger programs.